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The Taiwan Semiconductor Manufacturing Company (TSMC) has gained Santa Clara chip giant Intel Corporation and Cupertino tech giant Apple Inc's confidence for its next-generation 3nm chip process node. TSMC, the world's leading contract chip manufacturer, is currently building its 3nm chip plant in Taiwan's Tainan sector. According to details shared by the company technology symposium earlier this year, mass production for the node will kick off next year. The report comes courtesy of the Nikkei Asian Review, which quotes internal sources familiar with the matter to share the latest details.
Intel Working With TSMC To Design Two Central Processing Units - Secures Larger 3nm Chip Order Than Apple
These details suggest that Intel will use TSMC's 3nm node to regain the market share for notebooks and data centers lost to Santa Clara chip designer Advanced Micro Devices, Inc (AMD) over the past couple of years. By using TSMC's latest chip manufacturing technologies and introducing its unique chip designs, AMD has gained what most observers believe to be a process node advantage over Intel.
A semiconductor process node is often defined by the dimensions of a single transistor which is part of the billions present in a modern-day processor. At this front, nodes marketed by TSMC under the '7nm' branding are thought to be similar to those marketed by Intel under the 10nm branding due to similar physical dimensions of the transistors.
Intel is testing two processors with TSMC's 3nm, and the commercial output of the chips is expected to start next year, following in line with TSMC's estimates for 3nm mass production. A statement from Intel made to The Nikkei confirmed that it is working with the Taiwanese fab for products set to be launched in 2023.
Importantly, today's report also falls in line with the details TSMC revealed during its tech symposium held in June. In addition to introducing two new custom chip manufacturing processes, the company's senior vice president of research and development, Dr. Yuh Jier Mii, confirmed that tape-outs for the 3nm node have commenced. In the chip industry, a tape-out refers to one of the final stages of design, where companies such as AMD and Intel finalize their designs before sending them to fabricators such as TSMC for production.
During the event, Dr. Mii had revealed that the N3 process, which also covers the 3nm node, has experienced more than twice the tape-outs as its preceding processing family, the N5. Sharing details for N3's performance and power improvements over the first generation N5 chip manufacturing technology, the executive revealed that it offers up to 15% performance or 30% power efficiency, nearly doubles the density of logic circuits and improves performance for memory and other applications as well.
Intel's shift to using TSMC's 3nm process for its products is a historic first for the company, which has generally relied on its own manufacturing facilities in the United States for chip manufacturing. While Intel already sources some components of its processors from TSMC, the shift to 3nm comes as the company aggressively moves forward to accelerating its own manufacturing prowess.
Its 7nm process, believed to be theoretically equivalent to at least TSMC's 5nm, is currently scheduled for production in 2023. Nikkei's sources also believe that the overall chip volume TSMC has dedicated to Intel is higher than that dedicated to Apple, resulting in the smartphone maker delaying adopting the 3nm process for its next year's smartphone upgrade.
