AMD Adds Further Zen 4 CPU Support In Linux Patches, Enables RDDR5 & LRDDR5 For EPYC CPU With Up To 12-Channels

Hassan Mujtaba
AMD Adds Further Zen 4 CPU Support In Linux Patches, Enables RDDR5 & LRDDR5 For EPYC CPU With Up To 12-Channels

AMD is rolling out the first enablement patches of their next-generation EPYC Zen 4 CPUs and the new features incorporated within them for the Linux OS.

AMD Zen 4 Enablement Patches Rolling Out To Linux, Bring RDDR5 & LRDDR5 Memory Support

While AMD still isn't finished with Zen 3 on both client and server platforms, AMD's Linux team is already rolling out the initial patches for Zen 4 support in the Linux OS. As reported by Phoronix, the latest patches include support for AMD's next-generation EPYC server chips that will offer 12-channel memory support.

Related Story AMD Pushes Out Zen 5 Patches At Linux, New CPU Models Added To Kernel

AMD already rolled out patches that enabled support for AMD EPYC CPUs with up to 12 CCDs so this means that Linux currently has both Genoa and Bergamo added to the list. There's also new temperature monitoring support for Zen 4 CPUs & the latest patch further expands on the memory front.

The new patch brings support for up to 12-channel memory in both RDDR5 and LDDR5 flavors. The RDDR5 (Registered DDR5) & LRDDR5 (Load-Reduced DDR5) memory will both be supported by the AMD EPYC Zen 4 platforms with LRDDR5 aimed at dense memory servers. Each CPU will feature up to 12 memory controllers (per socket) which is an upgrade from the existing 8 controllers per chip. It is also reported that AMD's Zen 4 chips will be branded under the 'Family 19h Models 10h-1Fh and A0h-AFh'.

The EPYC Genoa chip renders revealed a total of 12 CCD's (16 cores per CCD) to reach 96 cores while the AMD Bergamo renders also show 12 CCDs but it is likely that either Zen 4C houses more cores per CCD or the render shown wasn't final as a 16 core CCD configuration would mean a total of 16 Zen 4 CCDs to hit 128 cores. The final die arrangement is definitely going to be an interesting sight. You can check out more information on both next-gen AMD EPYC CPU families that are launching with Zen 4 & Zen 4C cores in 2022 & 2023, respectively, here.

AMD EPYC CPU Families:

Family NameAMD EPYC VeniceAMD EPYC Turin-DenseAMD EPYC Turin-XAMD EPYC TurinAMD EPYC SienaAMD EPYC BergamoAMD EPYC Genoa-XAMD EPYC GenoaAMD EPYC Milan-XAMD EPYC MilanAMD EPYC RomeAMD EPYC Naples
Family BrandingEPYC 11K?EPYC 10K?EPYC 10K?EPYC 10K?EPYC 8004EPYC 9004EPYC 9004EPYC 9004EPYC 7004EPYC 7003EPYC 7002EPYC 7001
Family Launch2025+2025?2025?202420232023202320222022202120192017
CPU ArchitectureZen 6?Zen 5CZen 5Zen 5Zen 4Zen 4CZen 4 V-CacheZen 4Zen 3Zen 3Zen 2Zen 1
Process NodeTBD3nm TSMC?4nm TSMC4nm TSMC5nm TSMC4nm TSMC5nm TSMC5nm TSMC7nm TSMC7nm TSMC7nm TSMC14nm GloFo
Platform NameTBDSP5SP5SP5SP6SP5SP5SP5SP3SP3SP3SP3
SocketTBDLGA 6096 (SP5)LGA 6096 (SP5)LGA 6096LGA 4844LGA 6096LGA 6096LGA 6096LGA 4094LGA 4094LGA 4094LGA 4094
Max Core Count384?19212812864128969664646432
Max Thread Count768?38425625612825619219212812812864
Max L3 CacheTBD384 MB1536 MB384 MB256 MB256 MB1152 MB384 MB768 MB256 MB256 MB64 MB
Chiplet DesignTBD12 CCD's (1CCX per CCD) + 1 IOD16 CCD's (1CCX per CCD) + 1 IOD16 CCD's (1CCX per CCD) + 1 IOD8 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (2 CCX's per CCD) + 1 IOD4 CCD's (2 CCX's per CCD)
Memory SupportTBDDDR5-6000?DDR5-6000?DDR5-6000?DDR5-5200DDR5-5600DDR5-4800DDR5-4800DDR4-3200DDR4-3200DDR4-3200DDR4-2666
Memory ChannelsTBD12 Channel (SP5)12 Channel (SP5)12 Channel6-Channel12 Channel12 Channel12 Channel8 Channel8 Channel8 Channel8 Channel
PCIe Gen SupportTBDTBDTBDTBD96 Gen 5128 Gen 5128 Gen 5128 Gen 5128 Gen 4128 Gen 4128 Gen 464 Gen 3
TDP (Max)TBD480W (cTDP 600W)480W (cTDP 600W)480W (cTDP 600W)70-225W320W (cTDP 400W)400W400W280W280W280W200W
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