As we all know, the Sandy Bridge platform is strict in terms of locking the FSB on their chips, once only gets access to multiplier adjustment done through the K-series, ruining all the fun enthusiasts used to have in terms of overclocking.
Perhaps taking a few lessons from this will leave the next generation 22nm Ivy Bridge with some changes; that too unfortunately very limited. Due to a single clock generator controlling the speed of all electrical buses, overclocking of LGA-1155 compatible processors beyond the default 100 MHz base clock speed is very limited, up to 5-7% without other hardware components failing. 
Thus, Sandy Bridge is very limited when it comes to overclocking; mainly due to the internal clock generator on the processor, rather than traditionally being placed on chipsets.
So as Ivy Bridge will be backward compatible with the current chipsets, it won’t be completely open to the natural frequency, but still the guys at Intel are still trying to make up for the ground they lost with another feature used in the past times.
Old enthusiasts much remember the Pentium 2 era when there used to be a super-FSB with DIP switch that allowed us to choose between parameters of 66MHz, 84MHz, 100MHz and so on. Hence, Ivy Bridge is likely to have that feature that will allow overclockers to switch between its FSB back and forth, with each increment in the FSB up and down to about 5 percent of the space. For example, a bus speed of 100 MHz down to 95 MHz and upto 105 MHz respectively.
Also, one should expect the Ivy Bridge chips to support speeds of native DDR3-2133 MHz as there is a clear possibility of the future boards having DDR3-3000 MHz support as well! Even though the current Sandy Bridge chips run at DDR3-1333 MHz, it's likely to happen since as you may have heard about AMD's upcoming Bulldozers and APU's running at a native DDR3-1866MHz speeds.
